Gate-level simulation of ASIC in browser

mikewarot

I'm amazed. The technical wizardry involved in stuffing this into such a small area of Silicon, then simulating it in a web browser, is awe inspiring.

At the same time I'm filled with doubt I can get my BitGrid to the same state.

Taniwha

You can do it too, come on over to https://www.tinytapeout.com/

femto

Interesting: https://www.tinytapeout.com/competitions/demoscene-tt10/

This seems to be the currently open tapeout.

How low-level can you go with tinytapeout? One can imagine the insanity of doing a manual layout to push a demo to extremes.

Taniwha

You can work at the polygon level if you really want to, you can write gates and have it lay them out for you (or place them yourself), or work in a higher level language like verilog and have it compile them into gates for you (what most people do) - your choice

sans_souse

Those baseball caps are BALLIN

hgo

I _need_ to tinytapout! Don't know what, don't know how, but the sense of need is tickling! I feel like twelve again in front of a 286 without a case.

londons_explore

How many gates are here?

Is it near the crossover of where the same amount of logic can implement a tiny CPU which can run a program to generate the same output?

(I guess not in this case, because it needs to output 18 million pixels per second, and a micro-CPU probably won't be doing that anytime soon)

znah

Author here, and this is how running your design on real hardware feels https://x.com/zzznah/status/1876684831222067350?t=b8-zl-h6uV...

tmvphil

Completely wild to me that you are backing out the netlist from the geometry gds.

znah

First I implemented it, and then learned that it is called Layout vs Schematic (LVS). For now automatic conversion is limited to stateless cells, but I'm planning to rewrite the circuit extractor to support all flipflops and latches.

StringyBob

See also virtual 6502 and ARM1 e.g. http://www.visual6502.org/sim/varm/armgl.html

Aissen

You might also want floooh's remix which has a nicer UI, with the ability to see instructions evaluated, modify memory, assemble/disassemble code, view traces, etc.

Visual 6502 remix: https://floooh.github.io/visual6502remix/ Visual Z80 remix: https://floooh.github.io/visualz80remix/

butlike

This is going to sound quaint, but because of this simulation, this is the first time I realized they're _literal_ flags on the sides of the CPU, which is blowing my mind.

epcoa

You mean the pads? Those are the connection points for the wires that connect to the external package pins.

Aardwolf

This is amazing, I assume the sections lighting on/off are getting electrically activated, but what is this yellow orb slowly moving from left to right near the top?

croemer

My hunch is that that's the pixel that's currently addressed?

jasonjayr

It's the position of the electron beam in a CRT monitor -- from the VGA signal the hardware is emitting.

croemer

Yep, that's what I meant

mark_undoio

Looks like it - if you turn the simulation speed slider way up you can see the image forming as it passes over.

ge96

It looks visually cool

butlike

Tyrell Corporation

HN

Gate-level simulation of ASIC in browser

Gate-level simulation of ASIC in browser