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TSMC to start building four new plants with 1.4nm technology

GeekyBear

More information on the new node:

> TSMC's A14 is brand-new process technology that is based on the company's 2nd Generation GAAFET nanosheet transistors and new standard cell architecture to enable performance, power, and scaling advantages. TSMC expects its A14 to deliver a 10% to 15% performance improvement at the same power and complexity, a 25% to 30% lower power consumption at the same frequency as well as transistor count, and 20% - 23% higher transistor density (for mixed chip design and logic, respectively), compared to N2. Since A14 is an all-new node, it will require new IPs, optimizations, and EDA software than N2P (which leverages N2 IP) as well as A16, which is N2P with backside power delivery.

https://www.tomshardware.com/tech-industry/tsmc-unveils-1-4n...

chrsw

Kind of sad what's happened to US semiconductor manufacturing. Speaking from an American perspective, of course.

wood_spirit

The US is trying to get fabrication out of Taiwan so that it doesn’t need to defend Taiwan from China.

If you were Taiwanese this would worry you?

It makes complete sense for Taiwan to invest in maintaining it’s “silicon shield” even as china tries to catch up with fabrication on the mainland.

delfinom

I blame the American corporate meme. American corporations are hideously slow, lumbering and quite honestly many are just "too big to fail" prop ups at this point. Long gone are actual qualified individuals running even semiconductor manufacturers and its just bean counters and country club nephews.

null

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yapyap

anddd, just like any other Western Europesn country Americans need to be paid (semi-) living wages

leptons

American corporations are what created "Silicon Valley" in the first place. America is not slow, and it's definitely not "too big to fail" as the current administration is trying to make it fail, but that is an aside.

I think America doesn't manufacture semiconductors because it is a very unclean process, full of nasty chemicals. It's expensive to make semiconductors and deal with the clean-up. There are less environmental restrictions and cheaper labor in other parts of the world.

There are a bunch of Superfund sites around Mountain View, CA that serve as a reminder about the US Semiconductor industry - Fairchild Semiconductor, Intel, National Semiconductor, Monolithic Memories, and Raytheon to name a few.

Nobody in the U.S. really wants that in their back yard. Of course we've seen the same kind of thing from fracking, and everything else that rightly should be regulated or banned.

What happens now with a defunded and purposefully dysfunctional EPA is anyone's guess. Maybe manufacturers will exploit the political climate to further destroy the environment to make a few more million or billion dollars.

timschmidt

> American corporations are what created "Silicon Valley" in the first place.

According to https://steveblank.com/2009/04/27/the-secret-history-of-sili... and https://www.youtube.com/watch?v=ZTC_RxWN_xo the creation of Silicon Valley had more to do with academic expertise in radio research and Department of Defense funding circa World War II. Corporations were the "second wave".

o11c

Quite a bit of "Silicon Valley" was founded on outright theft from competitors. Now that the American industry is entrenched and "protect intellectual property" dominates over "improvement", falling behind other nations is inevitable.

smallmancontrov

TSMC's competitive advantage comes from Taiwan's unique willingness to look away from wanton dumping of used acid wash like it's the 80s in Silicon Valley? Or moderately more expensive labor on one of those highly automated factories with FOUPs zooming every which way?

Press (X) to doubt.

dom96

How close are we to the limits here? What is the smallest technology we can get to before physics gets in the way?

thechao

This is effective feature size and has little to do with actual geometry. Transistor size has barely budged in the last 10–15 years. The limitation is electrical, and it's not clear where that limit is. The smallest gate was built with an AFM out ~7 atoms; that's about 8 orders of magnitude smaller than a transistor, rn, and upwards of 9 than a stdcell. There's a LOT of room; we just don't know a good path to get to there.

mrb

"The smallest gate was built with an AFM out ~7 atoms; that's about 8 orders of magnitude smaller than a transistor"

I was thrown off by your statement, so here are some numbers: a modern chip like Nvidia's GH100 manufactured at a 5 nm process is 80 billion gates in 814 mm². That means a gate is 100 nm wide which is the width of 500 silicon atoms. On a 2D area that's 250k atoms. I don't know the thickness but assuming it's also 500 atoms then a gate has a volume of 125 million atoms.

So I guess you get your "8 orders of magnitude" difference if you compare the three-dimensional volume (7 atoms vs 125 million). But on one dimension it's only 2 orders of magnitude (7 atoms vs 500). And the semiconductor industry measures progress on one dimension so to me the "2 orders of magnitude" seems the more relevant comparison to make.

ZenoArrow

You're missing the key point, which is that the size referenced as the semiconductor manufacturing node is no longer an accurate description of the true transistor size, it's more of a marketing term.

Even if it's possible to build transistors that are 1.4nm in size (or smaller), that is not what "1.4nm" means in the context of this announcement. I get that this can be confusing, it's just a case of smoke and mirrors because Moore's Law is already dead and semiconductor manufacturers don't want to spook investors. The performance gains are still real, but the reasons for getting them are no longer as simple as shrinking transistor size.

As for the true physical limits of transistor sizes, there are problems like quantum tunnelling that we aren't likely to overcome, so even if you can build a gate with 7 atoms, that doesn't mean it'll work effectively. Also note that "gate" does not necessarily mean "transistor".

lossolo

So, it's more of an engineering problem than a physical one? I read somewhere a while ago about strange quantum effects activating at these scales too. What's the current state beyond 1.4 nm with our current knowledge?

IAmGraydon

I wonder if they see reduced geopolitical risk or if they simply must continue to operate as if nothing is going to happen until something happens.

wongarsu

TSMC announced new fabs in the US earlier this year. They need new fabs in Taiwan so nobody gets any ideas that TSMC could continue operations without a free Taiwan. Keeping Taiwan indispensable to the US is how they keep Chinese invasion plans in the planning state

ecshafer

Why would a free taiwan be necessary? I don’t think there ccp would have any qualms about tsmc continuing operation. A chinese company being the indisputed best at the modt advanced industry in the world is a good thing for them. Assuming a bloodless takeover occurred it would be business as usual.

pjc50

"Bloodless takeover" is assuming a lot. Pro unification is a very fringe position: https://en.m.wikipedia.org/wiki/Chinese_Unification_Promotio...

It seems very unlikely to me that between KMT loyalist troops and angry mobs that China would simply be allowed to take Taiwan without violence, and that nobody would decide to use TSMC as a hostage.

See the Swiss strategy, where every bridge and tunnel has its explosives pre-placed when it was built.

simfree

The whole system that supports TSMC will break down in the event of a war.

You can see this with SMIC and their inability to get modern lithography systems from the only leading edge vendor ASML. Sure, you can create your own vendors to replace such companies, but they are unlikely to ever catch up to the leading edge or even be only a generation or two behind the leading edge despite massive investments.

With non-leading edge equipment & processes you have to make compromises like making much larger chips so you can get the same compute in a low power profile. This drives up the initial cost of every device you make and you run into throughput issues like what Huawei has experienced where they cannot produce enough ships to ship their flagship ship phones at a reasonable price and simultaneously keep them in stock.

Instead you get boutique products that sell out practically immediately because there were so few units that were able to be manufactured.

ChrisMarshallNY

All they need to do, is open a fire exit, and run a leafblower.

Fabs run at BSL3. Get that dirty, and you have a whole lot of expensive scrap metal.

lukevp

The implication I got from the GP comment is that the U.S. would be reluctant to have CCP manufacturing the processors due to the (proven) risk that they’ll modify and backdoor stuff.

If TSMC over invests in US factories then they could be taken over under imminent domain if Taiwan was no longer independent. So they have to keep a large portion of manufacturing domestic to Taiwan for lessened geopolitical risk.

oc1

In that case almost any country would let their borders wide open for refugee visas to get the semiconductor talent over. even the us under trump.

lostlogin

Do you mean ‘bloodless’ like the way the CCP controls dissidents now?

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wonderwonder

There are rumors their fabs are rigged to self destruct rather than fall to china

https://www.theregister.com/AMP/2024/05/21/asml_kill_switch/

jonplackett

The best thing to do is become as valuable to the USA as possible

giuliomagnifico

By the time the factories are completed, Trump will likely have changed his mind about the tariffs a dozen times. Just move along..

null

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ranger_danger

(in Taiwan)

andsoitis

> (in Taiwan)

But also:

At the TSMC second-quarter earnings conference and conference call on Thursday, TSMC chairman C.C. Wei (魏哲家) said that after the completion of the company’s US$165 billion investment in the US, “about 30 percent of our 2-nanometer and more advanced capacity will be located in Arizona, creating an independent leading-edge semiconductor manufacturing cluster in the US.”

The Arizona investment includes six advanced wafer manufacturing fabs, two advanced packaging fabs and a major research and development center.

esseph

Hey, how much water would that infrastructure need, possibly?

nine_k

Isn't this water nearly 100% recyclable? It's not that it would get used up, like water used for watering of almond trees in California.

bgnn

As TSMC and Taiwang government policy, they always build it first in Taiwan, run for some years and then build in the US. They keep Taiwan relevant and protected this way.

consumer451

Geopolitics aside, is this not just good business sense given the accepted labor practices and talent pool in Taiwan vs. other countries?

indolering

Yeah, who wouldn't invest locally first when there is an economic advantage to doing so? Their suppliers, talent base, and management are all there already.

1over137

The hint is in the company’s name. ;)

flounder3

TSMC building outside of Taiwan is a big deal these days: https://en.wikipedia.org/wiki/TSMC#Arizona https://en.wikipedia.org/wiki/TSMC#Washington https://en.wikipedia.org/wiki/TSMC#Japan https://en.wikipedia.org/wiki/TSMC#Germany

From the article:

  "about 30 percent of our 2-nanometer and more advanced capacity will be located in Arizona"
.. so it's interesting that they are moving forward with domestic 1.4nm given the geopolitical climate.

barbazoo

> The hint is in the company’s name. ;)

They might build factories outside Taiwan you never know.

1over137

Of course. And were that the actual case, it would be worth having in the summary.

pj_mukh

The chips we need for the machines that will defend Taiwan are being built in Taiwan is just a ridiculous game of chicken to be setup.

I wish they’d take the next step with the defense treaty to move even more capacity (esp for the highest grade stuff) to stateside.

coolspot

Most of the defense tech is not using bleeding edge N2-N7 nodes.

MaxPock

What advantage will a 1.4nm chip have over a 4nm one? What new capabilities will this tech unlock on an edge device like my iPhone ? Please don't mention lower power consumption.

consumer451

> Please don't mention lower power consumption.

Silicon is way outside my wheelhouse, so genuine question: why not mention power consumption? In the data center, is this not one of the most important metrics?

UltraSane

It is even more important in portable battery powered devices.

gpm

> Please don't mention lower power consumption.

How about "longer battery life".

Also "lower cost".

Or sacrificing those on the alter of more compute running more complex things.

georgeburdell

Cost per transistor stopped going down awhile ago

voxic11

Can this be right?

For instance, GK104 on 28nm was 3.5 billion transistors. AD104 today is 35 billion. Is Nvidia really paying 10x as much for an AD104 die as a GK104 die?

dyauspitr

Lower power consumption makes almost no difference at the consumer tier.

gpm

My laptop definitely dies significantly faster when I'm making it work instead of just mindlessly scrolling on it... since the display is on in both cases I don't see what that could be but chip powre consumption making a singificant difference.

My phone dies much faster when I am using it, but admittedly screen usage means I can't prove that's chip power consumption.

VR headsets get noticeably hot in use, and I'm all but certain that that is largely chip power usage.

Macbook airs are the same speed as macbook pros until they thermally throttle, because the chips use too much power.

This claim just doesn't pass the smell test.

lostlogin

It might be niche, but I just got a new computer for this very reason.

Why wouldn’t you want lower power usage?

cogman10

I've not checked it, but AFAIK power consumption isn't really improved much if at all with dye shrinks. The main benefits are entirely around transistor density increases which allows for things like bigger caches.

It'll be beneficial to DRAM chips, allowing for higher density memory. And it'll be beneficial to GPGPUs, allowing for more GPU processors in a package.

buran77

> The main benefits are entirely around transistor density increases which allows for things like bigger caches

SRAM is probably the the worst example as it scales poorly with process shrinks. There are tricks still left in the bag to deal with this, like GAA, but caches and SRAM cells are not the headline here. It's power and general transistor density.

Waterluvian

Lower heat production.

UltraSane

Lower power consumption is always relevant for portable devices. 1.4nm will have many more transistors per mm^2 which should improve performance.

fuzzbazz

If the marketing naming is to be believed, in 1.4nm vs 4nm you'd be able to fit ~twice the transistors in your chip. That's twice the cores, twice the cache... That usually makes it faster.

gpm

If the marketing name is to believed... and we assume both dimensions scale the same... (4/1.4)^2 = 8.16x the transistors.

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bobsmooth

More chips per wafer.