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Less Slow C++

Less Slow C++

103 comments

·April 18, 2025

Earlier this year, I took a month to reexamine my coding habits and rethink some past design choices. I hope to rewrite and improve my FOSS libraries this year, and I needed answers to a few questions first. Perhaps some of these questions will resonate with others in the community, too.

  - Are coroutines viable for high-performance work?
  - Should I use SIMD intrinsics for clarity or drop to assembly for easier library distribution?
  - Has hardware caught up with vectorized scatter/gather in AVX-512 & SVE?
  - How do secure enclaves & pointer tagging differ on Intel, Arm, & AMD?
  - What's the throughput gap between CPU and GPU Tensor Cores (TCs)?
  - How costly are misaligned memory accesses & split-loads, and what gains do non-temporal loads/stores offer?
  - Which parts of the standard library hit performance hardest?
  - How do error-handling strategies compare overhead-wise?
  - What's the compile-time vs. run-time trade-off for lazily evaluated ranges?
  - What practical, non-trivial use cases exist for meta-programming?
  - How challenging is Linux Kernel bypass with io_uring vs. POSIX sockets?
  - How close are we to effectively using Networking TS or heterogeneous Executors in C++?
  - What are best practices for propagating stateful allocators in nested containers, and which libraries support them?
These questions span from micro-kernel optimizations (nanoseconds) to distributed systems (micro/millisecond latencies). Rather than tackling them all in one post, I compiled my explorations into a repository—extending my previous Google Benchmark tutorial (<https://ashvardanian.com/posts/google-benchmark>)—to serve as a sandbox for performance experimentation.

Some fun observations:

  - Compilers now vectorize 3x3x3 and 4x4x4 single/double precision multiplications well! The smaller one is ~60% slower despite 70% fewer operations, outperforming my vanilla SSE/AVX and coming within 10% of AVX-512.

  - Nvidia TCs vary dramatically across generations in numeric types, throughput, tile shapes, thread synchronization (thread/quad-pair/warp/warp-groups), and operand storage. Post-Volta, manual PTX is often needed (as intrinsics lag), though the new TileIR (introduced at GTC) promises improvements for dense linear algebra kernels.

  - The AI wave drives CPUs and GPUs to converge in mat-mul throughput & programming complexity. It took me a day to debug TMM register initialization, and SME is equally odd. Sierra Forest packs 288 cores/socket, and AVX10.2 drops 256-bit support for 512-bit... I wonder if discrete Intel GPUs are even needed, given CPU advances?

  - In common floating-point ranges, scalar sine approximations can be up to 40x faster than standard implementations, even without SIMD. It's a bit hand-wavy, though; I wish more projects documented error bounds and had 1 & 3.5 ULP variants like Sleef.

  - Meta-programming tools like CTRE can outperform typical RegEx engines by 5x and simplify building parsers compared to hand-crafted FSMs.

  - Once clearly distinct in complexity and performance (DPDK/SPDK vs. io_uring), the gap is narrowing. While pre-5.5 io_uring can boost UDP throughput by 4x on loopback IO, newer zero-copy and concurrency optimizations remain challenging.
The repository is loaded with links to favorite CppCon lectures, GitHub snippets, and tech blog posts. Recognizing that many high-level concepts are handled differently across languages, I've also started porting examples to Rust & Python in separate repos. Coroutines look bad everywhere :(

Overall, this research project was rewarding! Most questions found answers in code — except pointer tagging and secure enclaves, which still elude me in public cloud. I'd love to hear from others, especially on comparing High-Level Synthesis for small matrix multiplications on FPGAs versus hand-written VHDL/Verilog for integral types. Let me know if you have ideas for other cool, obscure topics to cover!

kllrnohj

> 40x faster trigonometry: Speed-up standard library functions like std::sin in just 3 lines of code.

Huh, ok, let's see how...

    *  By limiting the expansion to a few
    *  terms, we can approximate `sin(x)` as:
    *
    *      sin(x) ≈ x - (x^3)/3! + (x^5)/5!
    *
    *  This reduces the computational cost but comes with reduced accuracy.
I see. "reduced accuracy" is an understatement. It's just horrifically wrong for inputs outside the range of [-2, 2]

https://www.wolframalpha.com/input?i=plot+sin+x%2C+x+-+%28x%...

It cannot handle a single interval of a sin wave, much less the repeating nature? What an absolutely useless "optimization"

ashvardanian

You can always get more accuracy by expanding those 3 lines to handle more of the Taylor components… but it’s important to remember that this is still educational material.

You can find more complete examples in my SimSIMD (https://github.com/ashvardanian/SimSIMD), but they also often assume that at a certain part of a kernel, a floating point number is guaranteed to be in a certain range. This can greatly simplify the implementation for kernels like Atan2. For general-purpose inputs, go to SLEEF (https://sleef.org). Just remember that every large, complicated optimization starts with a small example.

jcranmer

Educational material that misinforms its readers isn't educational, and it's insanely counterproductive.

People have already ragged on you for doing Taylor approximation, and I'm not the best expert on the numerical analysis of implementing transcendental functions, so I won't pursue that further. But there's still several other unaddressed errors in your trigonometric code:

* If your function is going to omit range reduction, say so upfront. Saying "use me to get a 40× speedup because I omit part of the specification" is misleading to users, especially because you should assume that most users are not knowledgeable about floating-point and thus they aren't even going to understand they're missing something without you explicitly telling them!

* You're doing polynomial evaluation via `x * a + (x * x) * b + (x * x * x) * c` which is not the common way of doing so, and also, it's a slow way of doing so. If you're trying to be educational, do it via the `((((x * c) * x + b) * x) + a) * x` technique--that's how it's done, that's how it should be done.

* Also, doing `x / 6.0` is a disaster for performance, because fdiv is one of the slowest operations you can do. Why not do `x * (1.0 / 6.0)` instead?

* Doing really, really dumb floating-point code and then relying on -ffast-math to make the compiler unpick your dumbness is... a bad way of doing stuff. Especially since you're recommending people go for it for the easy speedup and saying absolutely nothing about where it can go catastrophically wrong. As Simon Byrne said, "Friends don't let friends use -ffast-math" (and the title of my explainer on floating-point will invariably be "Floating Point, or How I Learned to Start Worrying and Hate -ffast-math").

pclmulqdq

-ffast-math has about 15 separate compiler flags that go into it, and on any given piece of code, about 3-5 of them are disastrous for your numerical accuracy (but which 3-5 changes by application). If you do the other 10, you get most of the benefit without the inaccuracy. -ffast-math is especially dumb because it encourages people to go for all of them or nothing.

olaulaja

I'd say `x * a + (x * x) * b + (x * x * x) * c` is likely faster (subject to the compiler being reasonable) than `((((x * c) * x + b) * x) + a) * x` because it has a shorter longest instruction dependency chain. Add/Mul have higher throughput than latency, so the latency chain dominates performance and a few extra instructions will just get hidden away by instruction level parallelism.

Also x/6 vs x(1/6) is not as bad as it used to be, fdiv keeps getting faster. On my zen2 its 10 cycles latency and 0.33/cycle throughput for (vector) div, and 3 latency and 2/cycle throughput for (vector) add. So about 1/3 speed, worse if you have a lot of divs and the pipeline fills up. Going back to Pentium the difference is ~10x and you don't get to hide it with instruction parallelism.

* The first expression has a chain of 4 instructions that cannot be started before the last one finished `(((x * x) * x) * c) + the rest` vs the entire expression being a such a chain in the second version. Using fma instructions changes this a bit, making all the adds in both expressions 'free' but this changes precision and needs -ffast-math or such, which I agree is dangerous and generally ill advised.

dingdingdang

Someone is still putting tremendous effort into this project so I reckon it would be worthwhile to submit this, obviously well thought through, criticism as a PR for the repo!

mabster

For the range reduction, I've always been a fan of using revolutions rather than radians as the angle measure as you can just extract fractional bits to range reduce. Note that this is at the cost of a more complicated calculus.

I can't for the life of me find the Sony presentation, but the fastest polynomial calculation is somewhere between Horner's method (which has a huge dependency tree in terms of pipelining) and full polynomial evaluation (which has redundancy in calculation).

Totally with you on not relying on fast math! Not that I had much choice when I was working on games because that decision was made higher up!

Certhas

I don't know who the target audience is supposed to be, but who would be the type of person who tries to implement performance critical numerical codes but doesn't know the implications of Taylor expanding the sine function?

ashvardanian

I am genuinely quite surprised that the sine approximation is the eyeball catcher in that entire repo.

It will only take a 5-line PR to add Horner’s method and Chebyshev’s polynomials and probably around 20 lines of explanations, and everyone passionate about the topic is welcome to add them.

There are more than enough examples in the libraries mentioned above ;)

creato

I'd suggest simply adding `assert(-M_PI/2 <= x && x <= M_PI/2)` to your function. It won't slow down the code in optimized builds, and makes it obvious that it isn't designed to work outside that range even if people copy/paste the code without reading it or any comments.

Also, it would be good to have even in a "production" use of a function like this, in case something outside that range reaches it by accident.

ashvardanian

Yes, that’s a very productive suggestion! Feel free to open a PR, or I’ll just patch it myself in a couple of hours when I’m back to the computer. Thanks!

pclmulqdq

No. Do not use Taylor series approximations in your real code. They are slow and inaccurate. You can do much, much better with some basic numerical analysis. Chebyshev and Remez approximations will give you more bang for your buck every time.

kllrnohj

> but it’s important to remember that this is still educational material.

Then it should be educating on the applicability and limitations of things like this instead of just saying "reduced accuracy" and hoping the reader notices the massive issues? Kinda like the ffast-math section does.

meindnoch

And it's not even using the Horner scheme for evaluating the polynomial.

boricj

It's not useless if it's good enough for the problem at hand.

Kaze Emanuar has two entire videos dedicated to optimizing sin() on the Nintendo 64 and he's using approximations like this without issues in his homebrew:

  - https://www.youtube.com/watch?v=xFKFoGiGlXQ

  - https://www.youtube.com/watch?v=hffgNRfL1XY

pclmulqdq

I came to these videos expecting someone else pushing Taylor series, but this video series was surprisingly good in terms of talking about hacking their way through some numerical analysis. These videos started with Taylor series, but did not end there. They came up with some hacky but much better polynomial approximations, which are respectable. Production math libraries also use polynomial approximations. They just don't use Taylor series approximations.

readams

My small angle sin function is even faster: sin(x) = x

Analemma_

This is kind of a dumb objection. If your sine function has good accuracy in [-pi/2, pi/2], you can compute all other values by shifting the argument and/or multiplying the result by -1.

SkiFire13

But then you have to include this in the benchmark and it will no longer be 40x faster.

dzaima

There are a bunch of real situations where you can assume the input will be in a small range. And while reducing from [-pi;pi] or [-2*pi;2*pi] or whatever is gonna slow it down somewhat, I'm pretty sure it wouldn't be too significant, compared to the FP arith. (and branching on inputs outside of even that expanded target expected range is a fine strategy realistically)

kubav027

At least do not name the function "sin". One former game dev works in my company and he is using similar tricks all the time. It makes code so hard to read and unless you are computing "sin" a lot speedup is not measurable.

null

[deleted]

dzaima

At pi/2 that approximation gets you 1.0045, i.e. half a percent off, so it's not particularly good at that. (still could be sufficient for some uses though; but not the best achievable even with that performance)

TimorousBestie

Good argument reduction routines are not exactly easy for a novice to write, so I think this is a valid objection.

pclmulqdq

Oof this is bad. If you're going to ask people to approximate, use a Chebyshev approximation please. You will do sin(x) faster than this and more accurately.

boricj

The following comes from the complete opposite side of computing, microcontrollers. I've been working on an embedded system where the heap is about 256 KiB and the biggest stack has 4 KiB. I do write idiomatic modern C++ for the most part (even if I hate C++ metaprogramming with a passion), but not all tricks are suitable in all situations:

- CTRE is fine as long as you don't overflow the stack. I tried once to validate a string for a HTTP proxy configuration with an exhaustive regex, CTRE tried to allocate 5 KiB of stack 40 call frames in and therefore crashed the embedded system with a stack overflow. I've had to remove port validation from the regex (matching a number between 1 and 65535 was a bridge too far) and check that part by hand instead. I've also had to dumb down other CTRE regexes too in my code for similar reasons.

- Several constraints and design decisions led me to mostly ditch JSON internally and write my own BSON library. Instead of the traditional dynamically-allocated tree of nodes approach it works directly in-place, so I can give it a std::vector with a chunk of reserved memory upfront and not worry about memory allocation or fragmentation later on. One major benefit is that since there are no string escape sequences, I can return directly a std::string_view for string values. There are downsides to this approach, mostly revolving around modifications: one needs to be very careful not to invalidate iterators (which are raw pointers to the underlying buffer) while doing so and adding/removing entries towards the beginning of a large document is expensive due to the memmove().

- I ditched newlib for picolibc and exterminated anything that pulled in the C/C++ standard library locale code (that was over 130 kilobytes of Flash altogether IIRC), which includes among other things C++ streams (they are bad for plenty of other reasons too, but mine was program size).

You seem to have mostly aimed for throughput and raw performance in your benchmarks, which is fine for a generic desktop or server-class system with a MMU and plenty of resources. Just wanna point out that other environments will have different constraints that will mandate different kinds of optimizations, like memory usage (heap/stack/program size), dynamic memory fragmentation, real-time/jitter...

msarnoff

I’ve done C++ on a Cortex-M0+ with 8KB of flash. Code size is a big issue. You have to disable a bunch of stuff (no exceptions, nothing that does dynamic allocation) but you can still use classes, virtual methods, templates, constexpr, etc. These are all things that are a pain to do in C and usually require a bunch of gross macros.

uecker

As a former C++ programmer now writing C, I think this only true for templates, but it if you limited to somewhat this is also fine. For constexpr it depends what you use it for. If it something expensive to compute I would just run a program at build time (caching the output) and include the result. This seems preferable to me anyhow. The same for tests.

chrisrodrigue

Yeah, embedded C++ is a wildly different experience from vanilla. I've worked in large embedded C++ codebases where we couldn't use the STL and had to use homegrown containers for everything.

I wonder how Rust is stacking up (no pun intended) in the embedded game these days.

ashvardanian

Very true! I'd also go for similar optimizations when processing texts or sparse linear algebra on Nvidia and AMD GPUs. You only have ~50 KB of constant memory, ~50 MB of shared memory, and ~50 GB of global memory. It is BIG compared to microcontrollers but very little compared to the scope of problems often solved on GPUs. So many optimizations revolve around compressed representations and coalesced memory accesses.

I am still looking for a short example of such CUDA kernels, and I would love to see more embedded examples if you have thoughts ;)

boricj

I haven't had to reach for them so far either professionally or personally, but custom memory allocators (slab allocation, bump allocator...) and allocation strategies is something I've been meaning to look into. Too bad that the one game I've done reverse-engineering on used dynamic memory allocation for just about everything, with an allocator that uses a singly-linked list of used/free chunks that wouldn't look out of place in the 1980s.

I'm aware that the C++ standard library has polymorphic allocators alongside a couple of memory resource implementations. I've also heard that the dynamic dispatch for the polymorphic allocators could bring some optimization or speed penalties compared to a statically dispatched allocator or the standard std::allocator that uses operator new(), but I have no concrete data to judge either way.

leni536

> CTRE is fine as long as you don't overflow the stack

Which is to say CTRE is mostly not fine, if you use it on user-provided strings, regardless of target environment. It's heavily recursion based, with never spilling to the heap and otherwise no safeguards for memory use/recursion depth.

boricj

The regex which was overflowing the stack was something like this (simplified and from memory):

    ^http:\/\/([a-z0-9.-]+)\/?:([1-9]|[0-9][0-9]|[1-9][0-9][0-9]|[1-9][0-9][0-9][0-9]|[1-5][0-9][0-9][0-9][0-9]|6[0-4][0-9][0-9][0-9]|65[0-4][0-9][0-9]|655[0-2][0-9]|6553[0-5])$
Once I've given up validating the port number with the regex, it no longer blew up the stack:

    ^http:\/\/([a-z0-9.-]+)\/?:([1-9][0-9]{0,4})$
I'll admit I haven't done a thorough job of auditing the stack usage afterwards, but not all regexes look like Perl codegolf. For simple, straightforward patterns I don't see any problems using CTRE, but I'd be interested to see some proof to the contrary if you have some.

leni536

The problem can occur in general if there is a greedy match within the regex: https://github.com/hanickadot/compile-time-regular-expressio...

Although it looks like that this got fixed for simple patterns.

loeg

Not sure I'd reach for C++ or regexes in such a constrained micro environment. Anything where you don't directly understand the precise memory use is probably out.

boricj

The NumWorks N0100 graphical calculator had 1 MiB of Flash and 256 KiB of RAM. It packed seven mathematical apps (calculation, grapher, equations, statistics, regression, sequences, distributions) with a decently powerful maths engine/equation typesetter written in C++ and a MicroPython shell. They've paid a fair amount of attention to details in order to fit all of that in (least of all no STL), but C++ wielded correctly for embedded is no more of a memory hog than C.

Our target has ~1.5 MiB of Flash for program code and 512 KiB of RAM. We're using half of the former and maybe a third of the latter, the team barely paid any attention to program size or memory consumption. One day the project lead became slightly concerned about that and by the end of the day I shed off 20% of Flash and RAM usage going for the lowest hanging fruits.

I find it a bit amusing to call a 250 MHz STM32H5 MCU a constrained micro environment, if anything it's a bit overkill for what we need.

loeg

> least of all no STL

That's certainly a restricted dialect of C++.

> I find it a bit amusing to call a 250 MHz STM32H5 MCU a constrained micro environment, if anything it's a bit overkill for what we need.

I took an "embedded" systems class in college 15+ years ago that targeted a 32-bit ARM with megabytes of ram, so using these kBs of RAM micros in 2025 definitely feels like a constrained environment to me. The platforms I work on with C++ professionally have, ya know, hundreds of gigabytes of RAM (and our application gets ~100% of it).

vitus

Why choose Abseil for associative containers? It was a big deal when it first appeared on the scene, and it's certainly still better than the standard library for the most part, but there are now a number of alternatives that have since improved upon its weaknesses. (I've been especially impressed by Boost's unordered_flat_map.)

I have increasingly soured on Abseil over the past couple of years. At Google, we've seen an exodus of many of the core library maintainers, and some of the more recent design choices have been questionable at best.

ashvardanian

I've never tried `unordered_flat_map` and would probably prefer to keep Boost, Poco, Qt, and other mega-frameworks outside of this repo to make the builds leaner, but I'm open to alternatives. Which are the best to look into?

PaulDavisThe1st

boost:unordered is a header-only library.

spacechild1

I thought the same! And boost::unordered_flat_map is indeed awesome.

loeg

This is a hodgepodge of random stuff. Completely incoherent. Would not really point anyone at this to try and dig out gems.

ashvardanian

I agree that it may not be the most readable format. So far, the best-structured piece on similar topics I’ve seen is Algorithmica: <https://en.algorithmica.org/hpc>.

I am sure it overlaps in terms of topics, maybe even some examples, but the homepage suggests that the book is about 500 pages long. I generally don’t have a time budget to read that much, and in most cases, I want to play with the code more than read the text, especially when some new IO_uring feature, a metaprogramming tool, or an Assembly instruction comes out.

Another observation is that people don’t like to read into 5000-word essays on each topic. At best, those become training materials for the next LLMs and will affect future code only indirectly…

I’m all ears for alternative formats if you have recommendations, as I generally reimplement such projects every couple of years ;)

loeg

This could be like, 20 really good blog posts? A series? Idk. They don't have to be 5000+ words each :-).

johnisgood

Is there one for C? I do not like the "std:" whatnots.

mcdeltat

It does need some explanation and sectioning in between the readme and code comments, for the purpose of readability. I started reading the C++ source and wasn't sure what was happening, then realised the file is humongous and stopped. Perhaps splitting it into separate files with individual explanations would help. Also worth keeping in mind that with complex or intricate code, no one has any idea what you're doing unless you explicitly tell them.

I used such a structure in a benchmark suite https://github.com/MC-DeltaT/cpu-performance-demos

gblargg

Agreed. I'm not seeing any use of a automatic profiler to find the hot spots of one's code. If you don't know that, you're aiming blind on what to optimize and how much. The only profiling mentioned is something manual you have to add to each scope you want to time.

loeg

In so, so much code, basic big-O analysis, concurrency analysis (minimize mutable state / coordination), and even a little thought about CPU caches (including TLB) yields huge dividends.

EliRivers

If you're taking priority requests:

"How coding FPGA differs from GPU and what is High-Level Synthesis, Verilog, and VHDL? #36" Yes please!

ashvardanian

I've started implementing this, but organizing a good testing environment was time-consuming. If someone here has a sandbox and the right skill set, 3x3x3 or 4x4x4 matrix multiplications can be a perfect candidate for FPGA ports and case studies!

synthos

What data type/precision? How much parallelism versus iterative? Is this fully in fabric or part of a SoC? Easy to get mired in many details.

HW design has so many degrees of freedom which makes it fun but challenging.

What specific topics are you trying to address with this?

ashvardanian

Showing the tradeoffs between complexity & throughput of HLS and HDL implementations is the goal. I assume, uint8 should be sufficient to make a point?

almostgotcaught

There is no "coding FPGA". Verilog/VHDL are not programming languages, they are "hardware description languages" (HDL). That means when you write those languages literally what you're doing is specifying every single wire in the circuit. People that do FPGA work aren't even called programmers, they're called designers.

> High-Level Synthesis

Something that absolutely not a single professional designer uses.

ashvardanian

I agree that the sentiment around HLS is very bad, but there aren’t many good examples online, showcasing the difference. Do you think HDL vs HLS tradeoffs will be visible on something like 8-bit unsigned integer 3x3x3 or 4x4x4 matrix-multiplication?

kreetx

This is only from a cursory look, but it all looks really concise and practical - thank you for putting it all together!

spieswl

Hey! Your Google Benchmark post was one of my go-to resources when I started picking that up a couple years ago. I love to see the focus on performance benchmarking here, and the repository is laid out well. Nice work!

johnisgood

> Less Slow C, C++, and Assembly Code

I expected C code, too, not only .cpp and .S, however.

The less_slow.cpp uses a lot of C++-ism.

This may require fixing, or removal of "C" from the list.

standy13

I did not know about unnormalized floats. I sometimes wonder about it staring at my GPU when it multiplies matrices.

ashvardanian

I've made a bunch of bad measurements, until someone reminded me to:

  #if defined(__AVX512F__) || defined(__AVX2__)
  void configure_x86_denormals(void) {
      _MM_SET_FLUSH_ZERO_MODE(_MM_FLUSH_ZERO_ON);         // Flush results to zero
      _MM_SET_DENORMALS_ZERO_MODE(_MM_DENORMALS_ZERO_ON); // Treat denormal inputs as zero
  }
  #endif
It had a 50x performance impact on Intel. As benchmarked on `c7i.metal-48xl` instances:

  - `f64` throughput grew from 0.2 to 8.2 TFLOPS.
  - `f32` throughput grew from 0.6 to 15.1 TFLOPS.
Here is that section in the repo with more notes AVX-512, AMX, and other instructions: <https://github.com/ashvardanian/less_slow.cpp/blob/8f32d65cc...>.

cwzwarich

Intel has always had terrible subnormal performance. It's not that difficult to implement in HW, and even if you still want to optimize for the normalized case, we're talking about a 1 cycle penalty, not an order(s)-of-magnitude penalty.

nickysielicki

> Let me know if you have ideas for other cool, obscure topics to cover!

Everything that Kris Jusiak has under https://github.com/qlibs/ is worth a look.

intelVISA

Awesome, thanks.

Does C++ have a good async ('coroutine') story for io_uring yet?

ashvardanian

Great question! This has been top of mind for me for the last 2–3 years.

Short answer: sadly, no. I love the "usability" promise of coroutines—and even have 2–3 FOSS projects that could be rewritten entirely around C++ or Rust coroutines for better debuggability and extensibility—but my experiments show that the runtime cost of most coroutine‑like abstractions is simply too high. Frankly, I’m not even sure if a better design is possible on modern hardware.

This leads me to conclude that, despite my passion for SIMD and superscalar execution, the highest‑impact new assembly instructions that x86 and Arm could standardize would center on async execution and lightweight context switching... yet I haven’t seen any movement in that direction.

I also wrote toy examples for various range/async/stream models in C++, Rust, and Python, with measured latencies in inline comments:

  - Python: <https://github.com/ashvardanian/less_slow.py/blob/2c80c9dda6ef9aec18264871cfb51a13ac34685d/less_slow.py#L711-L722>
  - C++: <https://github.com/ashvardanian/less_slow.cpp/blob/8f32d65cc8976ad20c8cdf645caa5b39a1cf488b/less_slow.cpp#L3718-L3759>
  - Rust: <https://github.com/ashvardanian/less_slow.rs/blob/5add609533854bb6a5ddbf358cc15f06f68c82d2/less_slow.rs#L522-L533>
Aside from coroutines (toy hand-rolled implementations and commonly used libraries), I've also played around C++ executors, senders & receivers, but didn't have much success with them either. May be a skill issue.

haberman

> my experiments show that the runtime cost of most coroutine‑like abstractions is simply too high

Which runtime cost do you mean?

The main one I am aware of is a heap allocation per coroutine, though this can in some cases be elided if the coroutine is being called from another coroutine.

The other cost I am aware of is the initializing of the coroutine handle, but I think this is just a couple of pointers.

In both cases I would expect these overheads to be relatively modest compared to the cost of the I/O itself, though it's definitely better to elide the heap allocation when possible.

I don't know much about coroutine libraries like unifex (which I think your test is using), but a hand-coded prototype I was playing with doesn't seem to add much overhead: https://godbolt.org/z/8Kc1oKf15

If we can compile with -fno-exceptions, the code is even tighter: https://godbolt.org/z/5Yo8Pqvd5

My exploration into coroutines and I/O is only in the earliest stages, so I won't claim any of this to be definitive. But I am very interested in this question of whether the overhead is low enough to be a good match for io_uring or not.

PaulDavisThe1st

> lightweight context switching

the cost of context switch consists of two parts, one of which can be subdivided:

1. register save/restore

       1a. user-space only registers
       1b. full register save/restore, required in kernel space
2. the cost of the TLB flush, which is in turn proportional to the working set size of the switched-to process (i.e. if you don't touch much memory after the context switch, the cost is lower than if you do)

I am not sure that any assembler instructions could address either of these.

What do you have in mind?

hwpythonner

This is impressive work—feels like it should be packaged as a handbook for high-performance computing or even a practical guide for HFT developers. Great resource!